PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 746

• Manufacturer Part Number: PNX1501E
• Description: Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
• Manufacturer: NXP Semiconductors

Specifications of PNX1501E

• Product: DSPs
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-795
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details
• Other names: PNX1501E,557

Philips Semiconductors
Volume 1 of 1
4. Register Descriptions
12NC 9397 750 14321
Product data sheet
The actual interpretation of the contents of the MMIO registers is determined by a
software protocol used by the debug monitor running on the internal TM3260 CPU
and the debug front-end running on a host machine.
The communication between a host computer and a target system via JTAG requires
the following major components:
The PNX15xx Series has two JTAG data registers and two JTAG control registers
(see
registers.
The addresses are offsets from the MMIO_BASE.
Remark: The sleepless bit is not used in PNX15xx Series.
1. A Host computer with a serial or parallel interface.
2. A JTAG interface module (hardware) that asynchronously transfers data to and
3. A JTAG controller on the PNX15xx Series processor which provides a bridge
The host computer transfers data to and from the JTAG interface module,
preferably in word-parallel fashion. Also needed is JTAG interface device driver
software to access and modify the registers of the JTAG interface module.
from the host computer.
The interface module synchronously transfers data to and from the JTAG TAP on
a PNX15xx Series processor, supplies the test clock TCK and other signals to the
JTAG controller on PNX15xx Series. The interface module may be a PC plug-in
board.
This module may transfer data from and to the host computer in bit-serial or
word-parallel fashion. It transfers data from and to the JTAG registers on the
PNX15xx Series processor in bit-serial fashion in accordance with the IEEE
1149.1 Standard. The JTAG interface module connects to a 4 or 5-pin JTAG
connector on the PNX15xx Series board which provides a path to the JTAG pins
on the PNX15xx Series processor. It is the responsibility of the interface module
to scan data in and out of the PNX15xx Series processor into its internal buffers
and make them available to the host computer.
between the external JTAG TAP and the internal system.
The controller transfers data from/to the TAP to/from its scannable registers
asynchronous to the internal system clock. A monitor running on the internal
TM3260 CPU and the debugger front-end running on a host computer exchange
data via JTAG by reading/writing the MMIO registers reserved for this purpose,
including two control registers used for handshaking.
Figure
Table 4
3) in MMIO space and a number of JTAG instructions to manipulate those
Rev. 2 — 1 December 2004
lists the MMIO addresses of the JTAG data and control registers.
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
Chapter 24: TM3260 Debug
PNX15xx Series
24-7