PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 377

• Manufacturer Part Number: PNX1501E
• Description: Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
• Manufacturer: NXP Semiconductors

Specifications of PNX1501E

• Product: DSPs
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-795
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details
• Other names: PNX1501E,557

Philips Semiconductors
Volume 1 of 1
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Product data sheet
Table 8: Resource ID Assignment
The location of a layer in the overall QVCP address map is shown in
Table 9: Register Space Allocation
Each functional unit which belongs to a layer occupies a fixed spot within the layer
address range of 0x200H bytes. However the layer assignment of this functional unit
is programmable. It should usually follow the pixel data flow for a specific image
surface through the functional units involved.
Two 32-bit registers, RESOURCE_ID and FU_ASSIGNMENT, are used to assign all
resources to a specific layer address space. One is used to identify the resource to be
assigned. The other register is split up into 4-bit chunks which contain the specific
assignment for the resource identified in the first register. This allows for up to 8
resources of the same kind per functional unit. In this specific QVCP implementation
only a maximum of two of the same kind of each resource is needed for non-pool
resources and only one location is needed for the pooled resource. The remaining
slots are reserved for future implementations. The two registers act as access points
to an internal table which keeps the programmed values. All resources are
programmed through the same two registers. The ID register has to be written first.
Table 10
The value of Rn {n=0..5} is equivalent to the MMIO offset bits [12:9].
Table 10: Rn Association
ID
13
14
15
Address Range
0x0H - 0x1FFH
0x200H - 0x3FFH
0x400H - 0x5FFH
Rn
0
1
2
Figure 10: Resource Layer and ID
res.
28
outlines the association of a given Rn {n=0..5} value to an address space.
res.
24
res.
Rev. 2 — 1 December 2004
Functional Unit
CFTR (Color Features)
DCTI (Dynamic Color Transient Improvement)
PLAN (Semi Planar Channel)
20
Resource ID
res.
16
Address Space
Reserved for global QVCP addresses
0x200H - 0x3FFH (Layer 1)
0x400H - 0x5FFH (Layer 2)
res.
12
…Continued
res.
8
Function
Global QVCP register space
Layer 1 register space
Layer 2 register space
R2
4
R1
0
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
Resource-Layer Assignment Register
Resource ID Register (RID)
PNX15xx Series
Chapter 11: QVCP
Table
9.
11-31