PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 99
PNX1501E
Manufacturer Part Number
PNX1501E
Description
Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1501E.pdf
(819 pages)
Specifications of PNX1501E
Product
DSPs
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOT-795
Minimum Operating Temperature
0 C
Lead Free Status / Rohs Status
Details
Other names
PNX1501E,557
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Philips Semiconductors
Volume 1 of 1
Table 9: PCI/XIO-16 Bus Interface Unit Capabilities
12NC 9397 750 14321
Product data sheet
External Device
external PCI
master
external PCI slave 32-bit, up to 33 MHz
external 8-bit slave 8- and 16-bit wide,
standard (NOR)
Flash
NAND Flash
CIMaX device
1394 link core
Device Type
32-bit, up to 33 MHz
PCI masters
PCI targets
de-muxed address /
data devices on ‘XIO
bus’
8- and 16-bit wide
8- and 16-bit wide
8-bit data, 26-bit
address
8-bit data and 9-bit
address (Philips
PDI1394LXX)
The peripheral interface derives 24 of the 26 address wires and 8 out of the 16 data
wires from the PCI AD[31:0] pins. The remaining pins are XIO specific and non PCI
shared. An ‘XIO’ access looks like a valid PCI transaction to PCI master/targets on
the same wires. Unused XIO pins are available as GPIO pins.
The table below summarizes extension capabilities of the bus interface unit.
Capabilities
Arbitration built-in for up to 3 external PCI masters. Additional external masters
can be supported with external arbitration. External PCI bus masters can
perform high bandwidth, low latency DMA into and out of PNX15xx Series
DRAM. Large block transfer capable devices can sustain up to 100 MB/s into
DRAM.
Glueless connection supported for multiple devices subject only to capacitive
loading constraints. The TM3260 can perform low-latency 8/16/32-bit writes and
reads to/from PCI targets. Access by TM3260 can be enabled or disabled.
Up to 5 devices supported gluelessly, or unlimited number subject to capacitive
loading rules with external address decode logic. The TM3260 can perform 8-.
16- or 32-bit reads and writes to these ‘XIO’ devices, which are automatically
mapped to 8- or 16 bit wide transfers by the bus interface unit.
PNX15xx Series provides 5 chip selects, one of which is available for a Flash
device. Address range, and wait states for a Flash device are programmable.
The TM3260 can execute or read from Flash. Execution is low performance, and
only recommended for boot usage. The TM3260 can re-program Flash using
special software. Flash cannot be the target of a module DMA write - writes
require a software flash programming protocol.
Peak page mode read performance is at 66 MB/s for 16-bit devices and 33 MB/s
for 8-bit devices such as Intel StrataFlash (28FxxxJ3A, 32 Mbits, 64 Mbits, 128
Mbits) and ST MLC-NOR flash (M58LW064A, 64 Mbits). Cross-page random
read accesses each take 4 to 5 PCI clock cycles at 33 MHz depending on the
access-time of the device.
Flash is mostly active during system booting, or with low bandwidth during
system operation in order to implement a small non-volatile file system.
Direct execution, direct PI bus read or direct PI bus write from this Flash type are
not supported. Explicit programmed I/O through special NAND Flash PCI/XIO-8/
16 control/status registers is used to implement a file system on this disk-like
Flash type. Using the NAND-Flash XIO provisions, a peak bandwidth of 13
MB/s, and a sustained bandwidth of 11 MB/s can be obtained from a
AM30LV0064D 8Mx8 UltraNAND or equivalent Flash device. Maximum
throughput for serial burst accesses is 33 MB/s for 16-bit devices such as a
Samsung K9F5616U0B (16 Mbits x 16).
The external logic for conditional access consists of a CIMaX device, with 2
PCMCIA slot devices and glue logic (373, 245). This entire subsystem behaves
as an 8-bit wide slave with an up to 26-bit address space. This subsystem
interfaces gluelessly to the XIO bus, except for the possible logic needed to
combine the DTACK signalling of multiple devices.
There is medium bandwidth of communication between CIMaX and PNX15xx
Series, which is expected to not be an issue w.r.t. PCI performance.
The Philips PDI1394LXX family connects gluelessly to XIO in 8-bit data mode
using 8-bit data and 9-bit address with dedicated read and write strobes,
optional wait signal and a separate chip select. For systems which require high
asynchronous performance a 1394 link device with direct PCI connection can be
used.
Rev. 2 — 1 December 2004
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
PNX15xx Series
Chapter 2: Overview
2-25
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