mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 176

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Programming Model
Table 6-8 describes the DIR fields.
6.2.8 Software Watchdog Timer
The software watchdog timer prevents system lockup should the software become trapped
in loops with no controlled exit. The software watchdog timer can be enabled or disabled
through WRRR[EN]. If enabled, the watchdog timer requires the periodic execution of a
software watchdog servicing sequence. If this periodic servicing action does not occur, the
timer counts until it reaches the reset timeout value, resulting in a hardware reset with
RSTO driven low for 16 clocks. SCR[RSTSRC] is updated to indicate that the software
watchdog caused the reset.
If an interrupt timeout value is programmed in WIRR, and this value is reached prior to the
reset timeout value, WER[WIE] is set and a maskable interrupt is issued at the level defined
by ICR4[SWTOIPL].
The software watchdog consists of a 15-bit counter with a 15-bit prescaler. It counts up to
a maximum of 32768, with a resolution of 32768 clock periods. Thus, at 66 MHz, the
resolution of the watchdog is 0.5 msec, with a maximum timeout period of 32768 * 32768
= 2
6-12
Address
Value
31–28
27–22
21–12
11–1
Field
30
R/W
Bits
clock periods or 16.267 S.
31
forK75N
Number
Version
Version number. Indicates the revision number of the MCF5272.
Design center. Indicates the ColdFire design center
Device number. Indicates an MCF5272
Indicates the reduced JEDEC ID for Motorola. Joint Electron Device Engineering Council (JEDEC)
Publication 106-A and Chapter 11 of the IEEE Standard 1149.1 give more information on this field.
0010
28 27
Design Center
Figure 6-7. Device Identification Register (DIR)
0100_01
Timeout = (WRRR +1) * 32768 clocks
Table 6-8. DIR Field Descriptions
22 21
MCF5272 User’s Manual
Device Number
00_0000_0011
MBAR+0x010
Description
Read only
12 11
0000_0001_110
JEDEC ID
MOTOROLA
1
—
0
1