mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 379

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

MOTOROLA
16.4 UART Module Signal Definitions
Figure 16-21 shows both the external and internal signal groups.
Figure 16-21. UART Block Diagram Showing External and Internal Interface Signals
An internal interrupt request signal (IRQ) is provided to notify the interrupt controller of an
interrupt condition. The output is the logical NOR of unmasked UISRn bits. The interrupt
levels of the UART modules are programmed in SIM register ICR2. See Section 7.2,
“Interrupt Controller Registers.”
Table 16-15 briefly describes the UART module signals.
Transmitter Serial
Data Output
(URT_TxD)
Receiver Serial
Data Input
(URT_RxD)
Clear-to-Send
(URT_CTS)
To Interrupt
Controller
Signal
Interface
External clock (URT_CLK)
to CPU
(SIM)
CLKIN
The terms ‘assertion’ and ‘negation’ are used to avoid
confusion between active-low and active-high signals.
‘Asserted’ indicates that a signal is active, independent of the
voltage level; ‘negated’ indicates that a signal is inactive.
or
URT_TxD is held high (mark condition) when the transmitter is disabled, idle, or operating in the
local loop-back mode. Data is shifted out on URT_TxD on the falling edge of the clock source,
with the least significant bit (lsb) sent first.
Data received on URT_RxD is sampled on the rising edge of the clock source, with the lsb
received first.
This input can generate an interrupt on a change of state.
Address Bus
Control
Table 16-15. UART Module Signals
Data
IRQ
Internal
Control
Logic
Chapter 16. UART Modules
NOTE:
UART Module
Internal Bus
Description
Transmit Buffer
Receive Buffer
Clock Source
24-Character
24-Character
Output Port
Generator
Input Port
UART Module Signal Definitions
URT_CTS
URT_RTS
URT_RxD
URT_TxD
External
Interface
Signals
16-19