mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 350

no-image

mcf5272

Manufacturer Part Number
mcf5272
Description
Mcf5272 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mcf5272CVF66
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5272CVF66
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
mcf5272CVF66 K75N
Manufacturer:
ST
Quantity:
18
Part Number:
mcf5272CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5272CVM66
Manufacturer:
MOT
Quantity:
3
Part Number:
mcf5272CVM66
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5272CVM66
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
mcf5272CVM66
0
Company:
Part Number:
mcf5272CVM66
Quantity:
6 000
Part Number:
mcf5272CVM66J
Manufacturer:
NSC
Quantity:
36
Part Number:
mcf5272CVM66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5272CVM66R2
0
Part Number:
mcf5272NF66K75N
Manufacturer:
MOTOROLA
Quantity:
2
Part Number:
mcf5272VF66
Manufacturer:
HYNIX
Quantity:
19
Part Number:
mcf5272VF66
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5272VF66
Manufacturer:
FREESCALE
Quantity:
20 000
Address
Reset
Field
R/W
Programming Model
14.5.3 QSPI Wrap Register (QWR)
Table 14-5 gives QWR field descriptions.
14.5.4 QSPI Interrupt Register (QIR)
Figure 14-7 shows the QSPI interrupt register.
Address
14-12
Reset
Field
R/W
11–8
Bits
7–4
3–0
15
14
13
12
HALT WREN WRTO CSIV
15
WCEFB ABRTB
15
NEWQP Start of queue pointer. This 4-bit field points to the first entry in the RAM to be executed
ENDQP End of queue pointer. Points to the RAM entry that contains the last transfer description
CPTQP
WREN
WRTO
Name
HALT
CSIV
14
14
Halt transfers. Assertion of this bit causes the QSPI to stop execution of commands once
it has completed execution of the current command.
Wraparound enable. Enables wraparound mode.
0 Execution stops after executing the command pointed to by QWR[ENDQP].
1 After executing command pointed to by QWR[ENDQP], wrap back to entry zero, or the
Wraparound location. Determines where the QSPI wraps to in wraparound mode.
0 Wrap to RAM entry zero.
1 Wrap to RAM entry pointed to by QWR[NEWQP].
QSPI_CS inactive level.
0 QSPI chip select outputs return to zero when not driven from the value in the current
1 QSPI chip select outputs return to one when not driven from the value in the current
in the queue.
Completed queue entry pointer. Points to the RAM entry that contains the last command
to have been completed. This field is read only.
on initiating a transfer.
13
entry pointed to by QWR[NEWQP] and continue execution.
command RAM entry during a transfer (that is, inactive state is 0, chip selects are
active high).
command RAM entry during a transfer (that is, inactive state is 1, chip selects are
active low).
Figure 14-7. QSPI Interrupt Register (QIR)
— ABRTL WCEFE ABRTE — SPIFE
13
Figure 14-6. QSPI Wrap Register (QWR)
Table 14-5. QWR Field Descriptions
12
12
11
MCF5272 User’s Manual
11
ENDQP
0000_0000_0000_0000
0000_0000_0000_0000
10
MBAR + 0x00AC
MBAR + 0x00A8
R/W
R/W
9
8
Description
8
7
7
4
4
WCEF ABRT — SPIF
3
3
NEWQP
2
MOTOROLA
1
0
0

Related parts for mcf5272