mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 232

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

FEC Frame Transmission
11.4.4 Hash Table Algorithm
The hash table process used in the group hash filtering operates as follows. When a frame
with the destination address I/G bit set is received by the FEC, the 48-bit destination media
access control (MAC) address is mapped into one of 64 bins, which are represented by 64
bits stored in HTLR and HTUR. This is performed by passing the 48-bit MAC address
through the on-chip 32-bit CRC generator and selecting 6 bits of the CRC-encoded result
to generate a number between 0 and 63. Bit 31 of the CRC result selects HTUR (bit 31 =
1) or HTLR (bit 31 = 0). Bits 30–26 of the CRC result select the bit within the selected
register. If the CRC generator selects a bit that is set in the hash table, the frame is accepted;
otherwise, it is rejected. The result is that if eight group addresses are stored in the hash
table and random group addresses are received, the hash table prevents roughly 56/64 (or
87.5%) of the group address frames from reaching memory. Those that do reach memory
must be further filtered by the processor to determine if they truly contain one of the eight
preferred addresses.
11-8
Receive Frame
Receive Frame
Figure 11-4. Ethernet Address Recognition Flowchart
True
True
Check Address
Discard Frame
Promiscuous
I/G Address
Hash Match
Broadcast
Address
Mode
MCF5272 User’s Manual
?
?
?
?
G
False
False
False
(RCR[PROM] = 0)
False
I
True (RCR[PROM] = 1)
Perfect Match
?
True
Receive Frame
Set Miss Bit
Receive Frame
MOTOROLA