mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 384

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Operation
If the clear-to-send operation is enabled, CTS must be asserted for the character to be
transmitted. If CTS is negated in the middle of a transmission, the character in the shift
register is sent and TxD remains in mark state until CTS is reasserted. If the transmitter is
forced to send a continuous low condition by issuing a
transmitter ignores the state of CTS.
If the transmitter is programmed to automatically negate RTS when a message transmission
completes, RTS must be asserted manually before a message is sent. In applications in
which the transmitter is disabled after transmission is complete and RTS is appropriately
programmed, RTS is negated one bit time after the character in the shift register is
completely transmitted. The transmitter must be manually reenabled by reasserting RTS
before the next message is to be sent.
The transmitter must be enabled prior to accepting a
transmitter is disabled while the BREAK is active, the BREAK is not terminated. The
BREAK can only be terminated by using the
Figure 16-25 shows the functional timing information for the transmitter.
USRn[TxRDY]
16-24
Transmitter
Enabled
internal
module
1
2
3
4
select
Cn = transmit characters
W = write
UMR2n[TxCTS] = 1
UMR2n[TxRTS] = 1
CTS
RTS
TxD
3
4
Manually asserted
by
C1
W
BIT
2
1
-
SET
C1
1
command
Figure 16-25. Transmitter Timing
C1 in transmission
C2
W
MCF5272 User’s Manual
C2
C3
W
break
Start
STOP BREAK
W
C3
Break
START BREAK
command.
C4 Stop
W
START BREAK
break
W
C4
transmitted
not
C5
W
command. If the
command, the
MOTOROLA
Manually
asserted
C6
W
C6