mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 214

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

SDRAM Interface
9.10.3 SDRAM Refresh Timing
Figure 9-13 shows refresh-cycle timing. As in Figure 9-14, during a
command (T1), the SDRAM writes all of its on-chip RAM page buffers into the SDRAM
array. SDTR[RP] determines the number of dead cycles after a precharge. Note that self
refresh occurs during T3. In refresh state, SDRAM cannot accept any other command.
9-20
A10_PRECHG
Figure 9-12. SDRAM Burst Write, 32-Bit Port, Page Hit, Access = 3-1-1-1
SDADR[13:0]
SDBA[1:0]
SDCLKE
SDCLK
BS[3:0]
D[31:0]
SDWE
SDCS
RAS0
CAS0
T0
CF2 Core
T1
Address
Issue
MCF5272 User’s Manual
T2
Miss?
Page
Hit or
T3
Write
Data
1
Col
T4
Write
Data
Col
2
Bank
T5
Write
Data
3
Col
T6
Write
Data
Col
4
PRECHARGE ALL
T7
MOTOROLA
T8