mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 251

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mcf5272

Manufacturer Part Number
mcf5272
Description
Mcf5272 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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MOTOROLA
11.5.17 Hash Table High (HTUR)
The HTUR register, Figure 11-21, contains the upper 32 bits of the 64-bit hash table used
in the address recognition process for receive frames with a multicast address.
This register is not reset and must be initialized by the user prior to operation.
11.5.18 Hash Table Low (HTLR)
The HTLR register, Figure 11-22, contains the lower 32 bits of the 64-bit hash table used
in the address recognition process for receive frames with a multicast address.
This register is not reset and must be initialized by the user prior to operation.
Reset
Reset
Reset
Reset
Field
Field
Addr
Field
Field
R/W
R/W
Addr
R/W
R/W
31–0
Bits
31
15
31
15
HASH_HIGH
Name
The HTUR register contains the upper 32 bits of the 64-bit hash table used in the
address recognition process for receive frames with a multicast address.
Bit 31 of HTUR contains hash index bit 63.
Bit 0 of HTUR contains hash index bit 32.
Figure 11-21. Hash Table High (HTUR)
Figure 11-22. Hash Table Low (HTLR)
Table 11-25. HTUR Field Descriptions
Chapter 11. Ethernet Module
MBAR + 0xC0C
MBAR + 0xC08
HASH_HIGH
HASH_HIGH
HASH_LOW
HASH_LOW
Read/Write
Read/Write
Read/Write
Read/Write
Undefined
Undefined
Undefined
Undefined
Description
Programming Model
11-27
16
0
16
0

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