mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 65

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

System Design
to 2 stop bits in 1/16-bit increments. Receive and transmit FIFOs minimize CPU service
calls. A wide variety of error detection and maskable interrupt capability is provided.
Using a programmable prescaler or an external source, the MCF5272 system clock
supports various baud rates. Modem support is provided with request-to-send (RTS) and
clear-to-send (CTS) lines available externally. Full-duplex autoecho loopback, local
loopback, and remote loopback modes can be selected.
The UART can be programmed to interrupt or wake-up the CPU on various normal or
abnormal events. To reduce power consumption, the UART can be disabled by software if
not in use.
1.2.4 Timer Module
The timer module contains five timers arranged in two submodules. One submodule
contains a programmable software watchdog timer. The other contains four independent,
identical general-purpose timer units, each containing a free-running 16-bit timer for use in
various modes, including capturing the timer value with an external event, counting
external events, or triggering an external signal or interrupting the CPU when the timer
reaches a set value. Each unit has an 8-bit prescaler for deriving the clock input frequency
from the system clock or external clock input. The output pin associated with each timer
has programmable modes.
To reduce power consumption, the timer module can be disabled by software.
1.2.5 Test Access Port
For system diagnostics and manufacturing testing, the MCF5272 includes user-accessible
test logic that complies with the IEEE 1149.1 standard for boundary scan testing, often
referred to as JTAG (Joint Test Action Group). The IEEE 1149.1 Standard provides more
information.
1.3 System Design
This section presents issues to consider when designing with the MCF5272. It describes
differences between the MCF5272 (core and peripherals) and various other standard
components that are replaced by moving to an integrated device like the MCF5272.
1.3.1 System Bus Configuration
The MCF5272 has flexibility in its system bus interfacing due to the dynamic bus sizing
feature in which 32-,16-, and 8-bit data bus sizes are programmable on a per-chip select
basis. The programmable nature of the strobe signals (including OE/RD, R/W, BS[3:0], and
CSn) should ensure that external decode logic is minimal or nonexistent. Configuration
software is required upon power-on reset before chip-selected devices can be used, except
MOTOROLA
Chapter 1. Overview
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