mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 107

• Manufacturer Part Number: mc9s12q128
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

2.6
Port P and J generate a separate edge sensitive interrupt if enabled.
2.6.1
2.6.2
The PIM can generate wake-up interrupts from STOP on port P and J. For other sources of external
interrupts please refer to the respective Block User Guide.
2.7
It is not recommended to write PORTx and DDRx in a word access. When changing the register pins from
inputs to outputs, the data may have extra transitions during the write access. Initialize the port data register
before enabling the outputs.
Power consumption will increase the more the voltages on general purpose input pins deviate from the
supply voltages towards mid-range because the digital input buffers operate in the linear region.
Freescale Semiconductor
BKGD pin
Interrupts
Application Information
Port
Interrupt Sources
Interrupt Source
Recovery from STOP
M
T
S
P
A
B
E
J
Vector addresses and their relative interrupt priority are determined at the
MCU level.
Port P
Port J
Data Direction
Input
Input
Input
Input
Input
Table 2-40. Port Integration Module Interrupt Sources
Table 2-39. Port Reset State Summary
Interrupt Flag
PIFP[7:0]
PIFJ[7:6]
Pull Mode
Pull up
Pull up
Hi-z
Hi-z
Hi-z
Refer to MEBI Block Guide for details.
Refer to BDM Block Guide for details.
MC9S12Q128
Rev 1.09
NOTE
Reduced Drive
Reset States
Disabled
Disabled
Disabled
Disabled
Disabled
Chapter 2 Port Integration Module (PIM9C32) Block Description
Local Enable
PIEP[7:0]
PIEJ[7:6]
Wired-OR Mode
Disabled
Disabled
n/a
n/a
n/a
Global (CCR) Mask
I Bit
I Bit
Interrupt
Disabled
Disabled
n/a
n/a
n/a
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