mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 201

• Manufacturer Part Number: mc9s12q128
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

7.3.2.3
Freescale Semiconductor
Module Base + 0x0022
Starting address location affected by INITRG register setting.
Module Base + 0x0023
Starting address location affected by INITRG register setting.
Reset
Reset
Field
15:0
W
W
R
R
Bit 15
Bit 7
Trace Buffer Data Bits — The trace buffer data bits contain the data of the trace buffer. This register can be read
only as a word read. Any byte reads or misaligned access of these registers will return 0 and will not cause the
trace buffer pointer to increment to the next trace buffer address. The same is true for word reads while the
debugger is armed. In addition, this register may appear to contain incorrect data if it is not read with the same
capture mode bit settings as when the trace buffer data was recorded (See
Trace
Debug Trace Buffer Register (DBGTB)
15
u
u
7
Buffer”). Because reads will reflect the contents of the trace buffer RAM, the reset state is undefined.
= Unimplemented or Reserved
= Unimplemented or Reserved
Bit 14
Bit 6
Figure 7-6. Debug Trace Buffer Register High (DBGTBH)
Figure 7-7. Debug Trace Buffer Register Low (DBGTBL)
14
u
u
6
Table 7-7. DBGTB Field Descriptions
Bit 13
Bit 5
13
u
u
5
MC9S12Q128
Bit 12
Bit 4
Rev 1.09
12
u
u
4
Description
Bit 11
Bit 3
11
u
u
3
Chapter 7 Debug Module (DBGV1) Block Description
Bit 10
Bit 2
10
u
u
Section 7.4.2.9, “Reading Data from
2
Bit 9
Bit 1
u
u
9
1
Bit 8
Bit 0
u
u
8
0
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