mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 191

• Manufacturer Part Number: mc9s12q128
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 7
Debug Module (DBGV1) Block Description
7.1
This section describes the functionality of the debug (DBG) sub-block of the HCS12 core platform.
The DBG module is designed to be fully compatible with the existing BKP_HCS12_A module (BKP
mode) and furthermore provides an on-chip trace buffer with flexible triggering capability (DBG mode).
The DBG module provides for non-intrusive debug of application software. The DBG module is optimized
for the HCS12 16-bit architecture.
7.1.1
The DBG module in BKP mode includes these distinctive features:
Freescale Semiconductor
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Full or dual breakpoint mode
— Compare on address and data (full)
— Compare on either of two addresses (dual)
BDM or SWI breakpoint
— Enter BDM on breakpoint (BDM)
— Execute SWI on breakpoint (SWI)
Tagged or forced breakpoint
— Break just before a specific instruction will begin execution (TAG)
— Break on the first instruction boundary after a match occurs (Force)
Single, range, or page address compares
— Compare on address (single)
— Compare on address 256 byte (range)
— Compare on any 16K page (page)
At forced breakpoints compare address on read or write
High and/or low byte data compares
Comparator C can provide an additional tag or force breakpoint (enhancement for BKP mode)
Introduction
Features
MC9S12Q128
Rev 1.09
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