mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 238
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mc9s12q128
Manufacturer Part Number
mc9s12q128
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12Q128.pdf
(644 pages)
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Chapter 8 Analog-to-Digital Converter (ATD10B8C) Block Description
8.3.2.7
This read-only register contains the sequence complete flag, overrun flags for external trigger and FIFO
mode, and the conversion counter.
Read: Anytime
Write: Anytime (no effect on (CC2, CC1, CC0))
238
Module Base + 0x0006
ETORF
Reset
Field
SCF
7
5
W
R
SCF
Sequence Complete Flag — This flag is set upon completion of a conversion sequence. If conversion
sequences are continuously performed (SCAN = 1), the flag is set after each one is completed. This flag is
cleared when one of the following occurs:
0 Conversion sequence not completed
1 Conversion sequence has completed
External Trigger Overrun Flag — While in edge trigger mode (ETRIGLE = 0), if additional active edges are
detected while a conversion sequence is in process the overrun flag is set. This flag is cleared when one of the
following occurs:
0 No External trigger over run error has occurred
1 External trigger over run error has occurred
ATD Status Register 0 (ATDSTAT0)
0
7
A) Write “1” to SCF
B) Write to ATDCTL5 (a new conversion sequence is started)
C) If AFFC=1 and read of a result register
A) Write “1” to ETORF
B) Write to ATDCTL2, ATDCTL3 or ATDCTL4 (a conversion sequence is aborted)
C) Write to ATDCTL5 (a new conversion sequence is started)
= Unimplemented or Reserved
0
0
6
Figure 8-9. ATD Status Register 0 (ATDSTAT0)
Table 8-13. ATDSTAT0 Field Descriptions
ETORF
0
5
MC9S12Q128
FIFOR
Rev 1.09
0
4
Description
0
0
3
CC2
0
2
Freescale Semiconductor
CC1
0
1
CC0
0
0
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