mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 390
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mc9s12q128
Manufacturer Part Number
mc9s12q128
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12Q128.pdf
(644 pages)
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Chapter 13 Serial Communications Interface (S12SCIV2) Block Description
13.4
This section provides a complete functional description of the SCI block, detailing the operation of the
design from the end user perspective in a number of subsections.
Figure 13-9
communication between the CPU and remote devices, including other CPUs. The SCI transmitter and
receiver operate independently, although they use the same baud rate generator. The CPU monitors the
status of the SCI, writes the data to be transmitted, and processes received data.
390
CLOCK
BUS
RXD
SBR12–SBR0
Functional Description
shows the structure of the SCI module. The SCI allows full duplex, asynchronous, NRZ serial
GENERATOR
BAUD RATE
T8
16
SHIFT REGISTER
SHIFT REGISTER
DATA FORMAT
AND WAKEUP
TRANSMIT
TRANSMIT
REGISTER
CONTROL
CONTROL
CONTROL
SCI DATA
REGISTER
SCI DATA
RECEIVE
RECEIVE
Figure 13-9. SCI Block Diagram
MC9S12Q128
Rev 1.09
LOOPS
LOOPS
WAKE
RSRC
RSRC
RWU
SBK
RE
ILT
PE
PT
TE
M
RDRF
TDRE
IDLE
RAF
OR
NF
TC
R8
FE
PF
RIE
TCIE
ILIE
TIE
Freescale Semiconductor
TXD
TO CPU
IRQ
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