mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 319
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mc9s12q128
Manufacturer Part Number
mc9s12q128
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12Q128.pdf
(644 pages)
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Module Base + 0x00X1
Module Base + 0x00X2
ID[2:0]
Field
RTR
IDE
7:5
4
3
Reset:
Reset:
W
W
R
R
Standard Format Identifier — The identifiers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number. See also ID bits in
Remote Transmission Request — This flag reflects the status of the Remote Transmission Request bit in the
CAN frame. In the case of a receive buffer, it indicates the status of the received frame and supports the
transmission of an answering frame in software. In the case of a transmit buffer, this flag defines the setting of
the RTR bit to be sent.
0 Data frame
1 Remote frame
ID Extended — This flag indicates whether the extended or standard identifier format is applied in this buffer. In
the case of a receive buffer, the flag is set as received and indicates to the CPU how to process the buffer
identifier registers. In the case of a transmit buffer, the flag indicates to the MSCAN what type of identifier to send.
0 Standard format (11 bit)
1 Extended format (29 bit)
ID2
7
x
7
x
Figure 10-30. Identifier Register 1 — Standard Mapping
Figure 10-31. Identifier Register 2 — Standard Mapping
= Unused; always read ‘x’
= Unused; always read ‘x’
ID1
6
x
6
x
Table 10-29. IDR1 Register Field Descriptions
ID0
5
x
5
x
MC9S12Q128
Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
Rev 1.09
RTR
4
x
4
x
Description
IDE (=0)
x
x
3
3
2
x
2
x
Table
10-28.
x
x
1
1
0
x
0
x
319
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