mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 446

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mc9s12q128

Manufacturer Part Number
mc9s12q128
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Chapter 15 Timer Module (TIM16B6C) Block Description
15.3.2.14 Timer Input Capture/Output Compare Registers High and Low 2–7
Depending on the TIOS bit for the corresponding channel, these registers are used to latch the value of the
free-running counter when a defined transition is sensed by the corresponding input capture edge detector
or to trigger an output action for output compare.
Read: Anytime
Write: Anytime for output compare function.Writes to these registers have no meaning or effect during
input capture. All timer input capture/output compare registers are reset to 0x0000.
446
Module Base + 0x0014 = TC2H
Module Base + 0x0015 = TC2L
Reset
Reset
W
W
R
R
(TCxH and TCxL)
0x0016 = TC3H
0x0017 = TC3L
Read/Write access in byte mode for high byte should takes place before low
byte otherwise it will give a different result.
Figure 15-22. Timer Input Capture/Output Compare Register x High (TCxH)
Figure 15-23. Timer Input Capture/Output Compare Register x Low (TCxL)
Bit 15
Bit 7
15
0
0
7
Bit 14
Bit 6
14
0
0
6
0x0018 = TC4H
0x001A = TC5H
0x001C = TC6H
0x001E = TC7H
0x0019 = TC4L
0x001B = TC5L
0x001D = TC6L
0x001F = TC7L
Bit 13
Bit 5
13
0
0
5
MC9S12Q128
Rev 1.09
NOTE
Bit 12
Bit 4
12
0
4
0
Bit 11
Bit 3
11
0
0
3
Bit 10
Bit 2
10
0
2
0
Freescale Semiconductor
Bit 9
Bit 1
0
0
9
1
Bit 8
Bit 0
0
0
0
0

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