mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 377
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mc9s12q128
Manufacturer Part Number
mc9s12q128
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12Q128.pdf
(644 pages)
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12.4.2.8
Table 12-12
or center aligned) and 8-bit (normal) or 16-bit (concatenation):
12.5
The reset state of each individual bit is listed within the register description section (see
“Memory Map and Registers,”
modes which are initialized during or just following reset are described within this section.
12.6
The PWM8B4C module interrupt is disabled when PWM5ENA is clear.
“PWM Shutdown Register (PWMSDN).”
Freescale Semiconductor
A description of the registers involved and affected due to this interrupt is explained in
•
•
The 8-bit up/down counter is configured as an up counter out of reset.
All the channels are disabled and all the counters don’t count.
Resets
Interrupts
summarizes the boundary conditions for the PWM regardless of the output mode (left aligned
PWM Boundary Cases
User Software must ensure that PWM5ENA remains clear
1. Counter = 0x0000 and does not count.
(indicates no duty)
(indicates no duty)
>= PWMPERx
>= PWMPERx
PWMDTYx
0x0000
0x0000
XX
XX
which details the registers and their bit-fields. All special functions or
Table 12-12. PWM Boundary Cases
(indicates no period)
(indicates no period)
PWMPERx
0x0000
>0x0000
>0x0000
0x0000
MC9S12Q128
CAUTION
XX
XX
Rev 1.09
(1)
1
Chapter 12 Pulse-Width Modulator (PWM8B4C) Block Description
PPOLx
1
0
1
0
1
0
PWMx Output
Always High
Always High
Always High
Always Low
Always Low
Always Low
Section 12.3.2.15,
Section 12.3,
377
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