mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 93

• Manufacturer Part Number: mc9s12q128
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

2.3.2.4.3
Read: Anytime.
Write: Anytime.
2.3.2.4.4
Read: Anytime.
Write: Anytime.
Freescale Semiconductor
Module Base + 0x001A
Module Base + 0x001B
DDRP[7:0]
RDRP[7:0]
Reset
Reset
Field
Field
7–0
7–0
W
W
R
R
DDRP7
RDRP7
Data Direction Port P — This register configures each port P pin as either input or output.
0 Associated pin is configured as input.
1 Associated pin is configured as output.
Note: Due to internal synchronization circuits, it can take up to 2 bus cycles until the correct value is read on PTP
Reduced Drive Port P — This register configures the drive strength of each port P output pin as either full or
reduced. If the port is used as input this bit is ignored.
0 Full drive strength at output.
1 Associated pin drives at about 1/3 of the full drive strength.
0
0
7
7
Port P Data Direction Register (DDRP)
Port P Reduced Drive Register (RDRP)
or PTIP registers, when changing the DDRP register.
DDRP6
RDRP6
0
0
6
6
Figure 2-27. Port P Reduced Drive Register (RDRP)
Figure 2-26. Port P Data Direction Register (DDRP)
Table 2-22. DDRP Field Descriptions
Table 2-23. RDRP Field Descriptions
DDRP5
RDRP5
0
0
5
5
MC9S12Q128
DDRP4
RDRP4
Rev 1.09
0
0
4
4
Description
Description
Chapter 2 Port Integration Module (PIM9C32) Block Description
DDRP3
RDRP3
0
0
3
3
DDRP2
RDRP2
0
0
2
2
DDRP1
RDRP1
0
0
1
1
DDRP0
RDRP0
0
0
0
0
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