mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 611
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mc9s12q128
Manufacturer Part Number
mc9s12q128
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12Q128.pdf
(644 pages)
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A.2.2
The
The following constraints exist to obtain full-scale, full range results: V
This constraint exists since the sample buffer amplifier can not drive beyond the power supply levels that
it ties to. If the input level goes outside of this range it will effectively be clipped
1. The minimum time assumes a final sample period of 2 ATD clocks cycles while the maximum time assumes a final sample
A.2.3
Three factors — source resistance, source capacitance and current injection — have an influence on the
accuracy of the ATD.
A.2.3.1
Due to the input pin leakage current as specified in
there will be a voltage drop from the signal source to the ATD input. The maximum source resistance R
specifies results in an error of less than 1/2 LSB (2.5mV) at the maximum leakage current. If device or
operating conditions are less than worst case or leakage-induced error is acceptable, larger values of source
resistance is allowable.
A.2.3.2
When sampling an additional internal capacitor is switched to the input. This can cause a voltage drop due
to charge sharing with the external and the pin capacitance. For a maximum sampling error of the input
voltage 1LSB, then the external filter capacitor, C
Freescale Semiconductor
Conditions are shown in
Num C
period of 16 ATD clocks.
1
2
3
4
5
6
7
Table A-11
D
C Differential Reference Voltage
D ATD Clock Frequency
D
D
D Recovery Time (V
P Reference Supply current
Reference Potential
ATD 10-Bit Conversion Period
ATD 8-Bit Conversion Period
ATD Operating Characteristics In 3.3V Range
Factors Influencing Accuracy
Source Resistance
Source Capacitance
shows conditions under which the ATD operates.
Conv, Time at 2.0MHz ATD Clock f
Conv, Time at 2.0MHz ATD Clock f
Table A-4
DDA
=3.3 Volts)
Rating
unless otherwise noted; Supply Voltage 3.3V-10% <= V
Table A-11. ATD Operating Characteristics
Clock Cycles
Clock Cycles
MC9S12Q128
ATDCLK
ATDCLK
Rev 1.09
High
Low
(1)
Table A-6
f
1
1024 * (C
N
V
T
Symbol
N
f
T
ATDCLK
CONV10
RH
CONV10
CONV8
CONV8
t
I
V
V
REC
REF
RH
RL
-V
RL
in conjunction with the source resistance
INS
V
V
DDA
Min
3.0
0.5
14
12
—
—
– C
SSA
7
6
SSA
/2
INN
DDA
Appendix A Electrical Characteristics
).
V
<= 3.3V+10%
RL
Typ
3.3
—
—
—
—
—
—
—
—
—
V
IN
V
0.250
V
Max
DDA
V
3.6
2.0
28
14
26
13
20
DDA
RH
/2
V
Cycles
Cycles
MHz
Unit
DDA
mA
V
V
V
s
s
s
611
S
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