mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 444

• Manufacturer Part Number: mc9s12q128
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 15 Timer Module (TIM16B6C) Block Description
15.3.2.11 Timer System Control Register 2 (TSCR2)
Read: Anytime
Write: Anytime.
444
Module Base + 0x000D
PR[2:0]
Reset
TCRE
Field
TOI
7
3
2
W
R
Timer Overflow Interrupt Enable
0 Interrupt inhibited.
1 Hardware interrupt requested when TOF flag set.
Timer Counter Reset Enable — This bit allows the timer counter to be reset by a successful output compare 7
event. This mode of operation is similar to an up-counting modulus counter.
0 Counter reset inhibited and counter free runs.
1 Counter reset by a successful output compare 7.
If TC7 = 0x0000 and TCRE = 1, TCNT will stay at 0x0000 continuously. If TC7 = 0xFFFF and TCRE = 1, TOF
will never be set when TCNT is reset from 0xFFFF to 0x0000.
Timer Prescaler Select — These three bits select the frequency of the timer prescaler clock derived from the
Bus Clock as shown in
TOI
0
7
The newly selected prescale factor will not take effect until the next
synchronized edge where all prescale counter stages equal zero.
= Unimplemented or Reserved
Figure 15-19. Timer System Control Register 2 (TSCR2)
0
0
6
PR2
0
0
0
0
1
1
1
1
Table
Table 15-12. TSCR2 Field Descriptions
Table 15-13. Timer Clock Selection
15-13.
0
0
5
PR1
0
0
1
1
0
0
1
1
MC9S12Q128
Rev 1.09
NOTE
0
0
4
Description
PR0
0
1
0
1
0
1
0
1
TCRE
0
3
Bus Clock / 128
Bus Clock / 16
Bus Clock / 32
Bus Clock / 64
Bus Clock / 1
Bus Clock / 2
Bus Clock / 4
Bus Clock / 8
Timer Clock
PR2
0
2
Freescale Semiconductor
PR1
0
1
PR0
0
0