mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 351

• Manufacturer Part Number: mc9s12q128
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

12.3.2.1
Each PWM channel has an enable bit (PWMEx) to start its waveform output. When any of the PWMEx
bits are set (PWMEx = 1), the associated PWM output is enabled immediately. However, the actual PWM
waveform is not available on the associated PWM output until its clock source begins its next cycle due to
the synchronization of PWMEx and the clock source.
An exception to this is when channels are concatenated. After concatenated mode is enabled (CONxx bits
set in PWMCTL register), enabling/disabling the corresponding 16-bit PWM channel is controlled by the
low-order PWMEx bit. In this case, the high-order bytes PWMEx bits have no effect and their
corresponding PWM output lines are disabled.
While in run mode, if all PWM channels are disabled (PWME3–PWME0 = 0), the prescaler counter shuts
off for power savings.
Freescale Semiconductor
Address
0x001C
0x001D
0x001A
0x001B
0x001E
0x0013
0x0014
0x0015
0x0016
0x0017
0x0018
0x0019
PWMPER1
PWMPER2
PWMPER3
PWMPER1
PWMPER2
PWMPER3
PWMDTY0
PWMSDB
Reserved
Reserved
Reserved
Reserved
Name
PWM Enable Register (PWME)
The first PWM cycle after enabling the channel can be irregular.
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
PWMIF
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Figure 12-2. PWM Register Summary (continued)
= Unimplemented or Reserved
PWMIE
6
6
6
6
6
6
6
6
PWMRSTRT
MC9S12Q128
5
5
5
5
5
5
5
5
0
Rev 1.09
NOTE
Chapter 12 Pulse-Width Modulator (PWM8B4C) Block Description
PWMLVL
4
4
4
4
4
4
4
4
3
3
3
3
3
3
3
3
0
PWM5IN
2
2
2
2
2
2
2
2
PWM5INL PWM5ENA
1
1
1
1
1
1
1
1
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
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