mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 253

• Manufacturer Part Number: mc9s12q128
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

9.2
This section lists and describes the signals that connect off chip.
9.2.1
These pins provides operating voltage (V
the supply voltage to the PLL to be independently bypassed. Even if PLL usage is not required V
and V
9.2.2
A passive external loop filter must be placed on the XFC pin. The filter is a second-order, low-pass filter
to eliminate the VCO input ripple. The value of the external filter network and the reference frequency
determines the speed of the corrections and the stability of the PLL. Refer to the device overview chapter
for calculation of PLL loop filter (XFC) components. If PLL usage is not required the XFC pin must be
tied to V
Freescale Semiconductor
1
Refer to the device overview section for availability of the low-voltage reset feature.
SSPLL
XCLKS
EXTAL
XTAL
DDPLL
External Signal Description
RESET
V
V
V
XFC — PLL Loop Filter Pin
must be connected properly.
XFC
DDPLL
SSPLL
DDPLL
Regulator
Monitor
Oscil-
.
Voltage
Clock
lator
, V
SSPLL
OSCCLK
PLL
CRG
Power-on Reset
Low Voltage Reset
— PLL Operating Voltage, PLL Ground
PLLCLK
Figure 9-1. CRG Block Diagram
CM fail
DDPLL
MC9S12Q128
) and ground (V
Rev 1.09
Clock and Reset
1
Clock Quality
Chapter 9 Clocks and Reset Generator (CRGV4) Block Description
COP
Registers
Control
Checker
Generator
Reset
SSPLL
RTI
) for the PLL circuitry. This allows
Real-Time Interrupt
PLL Lock Interrupt
Self-Clock Mode
Oscillator Clock
System Reset
Core Clock
Bus Clock
Interrupt
DDPLL
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