mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 90

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mc9s12q128

Manufacturer Part Number
mc9s12q128
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Chapter 2 Port Integration Module (PIM9C32) Block Description
2.3.2.3.4
Read: Anytime.
Write: Anytime.
2.3.2.3.5
Read: Anytime.
Write: Anytime.
90
Module Base + 0x0013
Module Base + 0x0014
RDRM[5:0]
PERM[5:0]
Reset
Reset
Field
Field
5–0
5–0
W
W
R
R
Reduced Drive Port M — This register configures the drive strength of each port M output pin as either full or
reduced. If the port is used as input this bit is ignored.
0 Full drive strength at output.
1 Associated pin drives at about 1/3 of the full drive strength.
Pull Device Enable Port M — This register configures whether a pull-up or a pull-down device is activated, if
the port is used as input or as output in wired-or (open drain) mode. This bit has no effect if the port is used as
push-pull output. Out of reset a pull-up device is enabled.
0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
0
0
0
0
7
7
Port M Reduced Drive Register (RDRM)
Port M Pull Device Enable Register (PERM)
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 2-21. Port M Pull Device Enable Register (PERM)
0
0
0
0
6
6
Figure 2-20. Port M Reduced Drive Register (RDRM)
Table 2-18. RDRM Field Descriptions
Table 2-19. PERM Field Descriptions
RDRM5
PERM5
0
1
5
5
MC9S12Q128
RDRM4
PERM4
Rev 1.09
0
1
4
4
Description
Description
RDRM3
PERM3
0
1
3
3
RDRM2
PERM2
0
1
2
2
RDRM1
PERM1
Freescale Semiconductor
0
1
1
1
RDRM0
PERM0
0
1
0
0

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