mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 113
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mc9s12q128
Manufacturer Part Number
mc9s12q128
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12Q128.pdf
(644 pages)
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3.3.2.1
Read: Anytime
Write: Once in normal and emulation modes, anytime in special modes
This register initializes the position of the internal RAM within the on-chip system memory map.
Freescale Semiconductor
Module Base + 0x0010
Starting address location affected by INITRG register setting.
RAM[15:11]
RAMHAL
Reset
Field
7:3
0
W
R
RAM15
Internal RAM Map Position — These bits determine the upper five bits of the base address for the system’s
internal RAM array.
RAM High-Align — RAMHAL specifies the alignment of the internal RAM array.
0 Aligns the RAM to the lowest address (0x0000) of the mappable space
1 Aligns the RAM to the higher address (0xFFFF) of the mappable space
Initialization of Internal RAM Position Register (INITRM)
0
7
Writes to this register take one cycle to go into effect.
Figure 3-3. Initialization of Internal RAM Position Register (INITRM)
= Unimplemented or Reserved
RAM14
0
6
Table 3-2. INITRM Field Descriptions
RAM13
0
5
MC9S12Q128
RAM12
Rev 1.09
NOTE
0
4
Description
Chapter 3 Module Mapping Control (MMCV4) Block Description
RAM11
1
3
0
0
2
0
0
1
RAMHAL
1
0
113
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