mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 376

• Manufacturer Part Number: mc9s12q128
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 12 Pulse-Width Modulator (PWM8B4C) Block Description
When using the 16-bit concatenated mode, the clock source is determined by the low-order 8-bit channel
clock select control bits. That is channel 3 when channels 2 and 3 are concatenated, and channel 1 when
channels 0 and 1 are concatenated. The resulting PWM is output to the pins of the corresponding low-order
8-bit channel as also shown in
PPOLx bit of the corresponding low-order 8-bit channel as well.
After concatenated mode is enabled (CONxx bits set in PWMCTL register), enabling/disabling the
corresponding 16-bit PWM channel is controlled by the low-order PWMEx bit. In this case, the high-order
bytes PWMEx bits have no effect and their corresponding PWM output is disabled.
In concatenated mode, writes to the 16-bit counter by using a 16-bit access or writes to either the low or
high-order byte of the counter will reset the 16-bit counter. Reads of the 16-bit counter must be made by
16-bit access to maintain data coherency.
Either left aligned or center aligned output mode can be used in concatenated mode and is controlled by
the low-order CAEx bit. The high-order CAEx bit has no effect.
Table 12-11
mode.
376
is used to summarize which channels are used to set the various control bits when in 16-bit
Clock Source 3
Clock Source 1
CONxx
CON23
CON01
Table 12-11. 16-bit Concatenation Mode Summary
Figure
PWMEx
PWME3
PWME1
Figure 12-34. PWM 16-Bit Mode
12-34. The polarity of the resulting PWM output is controlled by the
PWMCNT2
PWMCNT0
PPOLx
PPOL3
PPOL1
High
High
MC9S12Q128
Period/Duty Compare
Period/Duty Compare
Rev 1.09
PCLKx
PCLK3
PCLK1
PWCNT3
PWCNT1
CAEx
CAE3
CAE1
Low
Low
PWMx Output
PWM3
PWM1
PWM3
PWM1
Freescale Semiconductor