PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 12

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PIC18F25J50

Manufacturer Part Number
PIC18F25J50
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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PIC18F46J50 FAMILY
1.1.5
The PIC18F46J50 family implements the optional
extension to the PIC18 instruction set, adding eight
new instructions and an Indexed Addressing mode.
Enabled as a device configuration option, the extension
has been specifically designed to optimize re-entrant
application code originally developed in high-level
languages, such as C.
1.1.6
Regardless of the memory size, all devices share the
same rich set of peripherals, allowing for a smooth
migration path as applications grow and evolve.
The consistent pinout scheme used throughout the
entire family also aids in migrating to the next larger
device.
The PIC18F46J50 family is also pin compatible with
other PIC18 families, such as the PIC18F4550,
PIC18F2450 and PIC18F45J10. This allows a new
dimension to the evolution of applications, allowing
developers to select different price points within
Microchip’s PIC18 portfolio, while maintaining the
same feature set.
1.2
• Communications: The PIC18F46J50 family
• ECCP Modules: All devices in the family incorpo-
DS39931D-page 12
incorporates a range of serial and parallel com-
munication peripherals, including a fully featured
USB communications module that is compliant
with the “USB Specification Revision 2.0”. This
device also includes two independent Enhanced
USARTs and two Master Synchronous Serial Port
(MSSP) modules, capable of both Serial
Peripheral Interface (SPI) and I
Slave) modes of operation. The device also has a
parallel port and can be configured to serve as
either a Parallel Master Port (PMP) or as a
Parallel Slave Port (PSP).
rate three Enhanced Capture/Compare/PWM
(ECCP) modules to maximize flexibility in control
applications. Up to four different time bases may
be used to perform several different operations at
once. Each of the ECCPs offers up to four PWM
outputs, allowing for a total of eight PWMs. The
ECCPs also offer many beneficial features,
including polarity selection, programmable dead
time, auto-shutdown and restart and Half-Bridge
and Full-Bridge Output modes.
Other Special Features
EXTENDED INSTRUCTION SET
EASY MIGRATION
2
C™ (Master and
• 10-Bit A/D Converter: This module incorporates
• Extended Watchdog Timer (WDT): This
1.3
Devices in the PIC18F46J50 family are available on
28-pin and 44-pin packages. Block diagrams for the
two groups are shown in
The devices are differentiated from each other in two
ways:
• Flash program memory (three sizes: 16 Kbytes
• I/O ports (three bidirectional ports on 28-pin
All other features for devices in this family are identical.
These are summarized in
The pinouts for the PIC18F2XJ50 devices are listed in
Table
are shown in
The PIC18F46J50 family of devices provides an
on-chip voltage regulator to supply the correct voltage
levels to the core. Parts designated with an “F” part
number (such as PIC18F46J50) have the voltage
regulator enabled.
These parts can run from 2.15V-3.6V on V
have the V
low-ESR capacitor. Parts designated with an “LF” part
number (such as PIC18LF46J50) do not enable the volt-
age regulator. For “LF” parts, an external supply of
2.0V-2.7V has to be supplied to the V
2.0V-3.6V can be supplied to V
never exceed V
For more details about the internal voltage regulator,
see
programmable acquisition time, allowing for a
channel to be selected and a conversion to be
initiated without waiting for a sampling period, and
thus, reducing code overhead.
enhanced version incorporates a 16-bit prescaler,
allowing an extended time-out range that is stable
across operating voltage and temperature. See
Section 30.0 “Electrical Characteristics”
time-out periods.
for the PIC18FX4J50, 32 Kbytes for
PIC18FX5J50 devices and 64 Kbytes for
PIC18FX6J50)
devices, five bidirectional ports on 44-pin devices)
Section 27.3 “On-Chip Voltage
1-3. The pinouts for the PIC18F4XJ50 devices
Details on Individual Family
Devices
DDCORE
Table
DD
).
1-4.
pin connected to V
 2011 Microchip Technology Inc.
Table 1-1
Figure 1-1
DD
and
(V
DDCORE
Regulator”.
and
DDCORE
Table
DD,
SS
Figure
but should
through a
pin while
for
1-2.
should
1-2.

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