PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 95
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PIC18F25J50
Manufacturer Part Number
PIC18F25J50
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F25J50.pdf
(562 pages)
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TABLE 6-4:
2011 Microchip Technology Inc.
RPINR3
RPINR2
RPINR1
RPOR24
RPOR23
RPOR22
RPOR21
RPOR20
RPOR19
RPOR18
RPOR17
RPOR13
RPOR12
RPOR11
RPOR10
RPOR9
RPOR8
RPOR7
RPOR6
RPOR5
RPOR4
RPOR3
RPOR2
RPOR1
RPOR0
Legend:
Note
File Name
1:
2:
3:
4:
5:
6:
7:
(5)
(5)
(5)
(5)
(5)
(5)
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition, r = reserved. Bold indicates shared access SFRs.
Bit 21 of the PC is only available in Serial Programming (SP) modes.
Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.
The SSPxMSK registers are only accessible when SSPxCON2<3:0> = 1001.
Alternate names and definitions for these bits when the MSSP module is operating in I
Masking Modes”
These bits and/or registers are only available on 44-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset values are
shown for 44-pin devices.
The PMADDRH/PMDOUT1H and PMADDRL/PMDOUT1L register pairs share the same physical registers and addresses, but have
different functions determined by the module’s operating mode. See
The TRISA6 and TRISA7 bits are only implemented when the pins are not configured for primary oscillator functions.
Bit 7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
REGISTER FILE SUMMARY (PIC18F46J50 FAMILY) (CONTINUED)
for details.
Bit 6
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Bit 5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Input Function INT3 to Input Pin Mapping Bits
Input Function INT2 to Input Pin Mapping Bits
Input Function INT1 to Input Pin Mapping Bits
Remappable Pin RP24 Output Signal Select Bits
Remappable Pin RP23 Output Signal Select Bits
Remappable Pin RP22 Output Signal Select Bits
Remappable Pin RP21 Output Signal Select Bits
Remappable Pin RP20 Output Signal Select Bits
Remappable Pin RP19 Output Signal Select Bits
Remappable Pin RP18 Output Signal Select Bits
Remappable Pin RP17 Output Signal Select Bits
Remappable Pin RP13 Output Signal Select Bits
Remappable Pin RP12 Output Signal Select Bits
Remappable Pin RP11 Output Signal Select Bits
Remappable Pin RP10 Output Signal Select Bits
Remappable Pin RP9 Output Signal Select Bits
Remappable Pin RP8 Output Signal Select Bits
Remappable Pin RP7 Output Signal Select Bits
Remappable Pin RP6 Output Signal Select Bits
Remappable Pin RP5 Output Signal Select Bits
Remappable Pin RP4 Output Signal Select Bits
Remappable Pin RP3 Output Signal Select Bits
Remappable Pin RP2 Output Signal Select Bits
Remappable Pin RP1 Output Signal Select Bits
Remappable Pin RP0 Output Signal Select Bits
Bit 4
Bit 3
PIC18F46J50 FAMILY
Section 11.1.2 “Data Registers”
Bit 2
2
C™ Slave mode. See
Bit 1
for more information.
Bit 0
Section 19.5.3.2 “Address
DS39931D-page 95
---1 1111 76,
---1 1111
---1 1111 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
---0 0000 76,
POR, BOR
Value on
on Page:
Details
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