PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 395

• Manufacturer Part Number: PIC18F25J50
• Description: 28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

25.0
The High/Low-Voltage Detect (HLVD) module can be
used to monitor the absolute voltage on V
HLVDIN pin. This is a programmable circuit that allows
the user to specify both a device voltage trip point and
the direction of change from that point.
If the module detects an excursion past the trip point in
that direction, an interrupt flag is set. If the interrupt is
enabled, the program execution will branch to the inter-
rupt vector address and the software can then respond
to the interrupt.
REGISTER 25-1:
The module is enabled by setting the HLVDEN bit.
Each time the module is enabled, the circuitry requires
some time to stabilize. The IRVST bit is a read-only bit
that indicates when the circuit is stable. The module
can generate an interrupt only after the circuit is stable
and IRVST is set.
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
Note 1:
VDIRMAG
R/W-0
HIGH/LOW VOLTAGE DETECT
(HLVD)
See
Table 30-8
VDIRMAG: Voltage Direction Magnitude Select bit
1 = Event occurs when voltage equals or exceeds trip point (HLVDL<3:0>)
0 = Event occurs when voltage equals or falls below trip point (HLVDL<3:0>)
BGVST: Band Gap Reference Voltages Stable Status Flag bit
1 = Indicates internal band gap voltage references are stable
0 = Indicates internal band gap voltage references are not stable
IRVST: Internal Reference Voltage Stable Flag bit
1 = Indicates that the voltage detect logic will generate the interrupt flag at the specified voltage range
0 = Indicates that the voltage detect logic will not generate the interrupt flag at the specified voltage
HLVDEN: High/Low-Voltage Detect Power Enable bit
1 = HLVD enabled
0 = HLVD disabled
HLVDL<3:0>: Voltage Detection Limit bits
1111 = External analog input is used (input comes from the HLVDIN pin)
1110 = Maximum setting
.
.
.
1000 = Minimum setting
0xxx = Reserved
BGVST
range and the HLVD interrupt should not be enabled
R-0
HLVDCON: HIGH/LOW-VOLTAGE DETECT CONTROL REGISTER (ACCESS F85h)
in
Section 30.0 “Electrical Characteristics”
W = Writable bit
‘1’ = Bit is set
IRVST
R-0
DD
HLVDEN
or the
R/W-0
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
HLVDL3
PIC18F46J50 FAMILY
R/W-0
The
(Register
HLVD module. This allows the circuitry to be “turned
off” by the user under software control, which
minimizes the current consumption for the device.
Figure 25-1
module.
The VDIRMAG bit determines the overall operation of
the module. When VDIRMAG is cleared, the module
monitors for drops in V
point. When the bit is set, the module monitors for rises
in V
DD
(1)
High/Low-Voltage
above the set point.
25-1) completely controls the operation of the
for specifications.
HLVDL2
provides a block diagram for the HLVD
R/W-0
(1)
DD
x = Bit is unknown
below a predetermined set
Detect
HLVDL1
R/W-0
DS39931D-page 395
(1)
Control
HLVDL0
R/W-0
register
bit 0
(1)