PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 428

• Manufacturer Part Number: PIC18F25J50
• Description: 28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F46J50 FAMILY
REGISTER 27-11: WDTCON: WATCHDOG TIMER CONTROL REGISTER (ACCESS FC0h)
TABLE 27-3:
DS39931D-page 428
RCON
WDTCON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Watchdog Timer.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
REGSLP
Name
R/W-1
2:
This bit has no effect if the Configuration bit, WDTEN, is enabled.
Not available on devices where the on-chip voltage regulator is disabled (“LF” devices).
REGSLP LVDSTAT ULPLVL
REGSLP: Voltage Regulator Low-Power Operation Enable bit
1 = On-chip regulator enters low-power operation when device enters Sleep mode
0 = On-chip regulator is active even in Sleep mode
LVDSTAT: Low-Voltage Detect Status bit
1 = V
0 = V
ULPLVL: Ultra Low-Power Wake-up Output bit (not valid unless ULPEN = 1)
1 = Voltage on RA0 > ~0.5V
0 = Voltage on RA0 < ~0.5V
Unimplemented: Read as ‘0’
DS: Deep Sleep Wake-up Status bit (used in conjunction with RCON, POR and BOR bits to determine
Reset source)
1 = If the last exit from Reset was caused by a normal wake-up from Deep Sleep
0 = If the last exit from Reset was not due to a wake-up from Deep Sleep
ULPEN: Ultra Low-Power Wake-up Module Enable bit
1 = Ultra Low-Power Wake-up module is enabled; ULPLVL bit indicates the comparator output
0 = Ultra Low-Power Wake-up module is disabled
ULPSINK: Ultra Low-Power Wake-up Current Sink Enable bit
1 = Ultra Low-Power Wake-up current sink is enabled
0 = Ultra Low-Power Wake-up current sink is disabled
SWDTEN: Software Controlled Watchdog Timer Enable bit
1 = Watchdog Timer is on
0 = Watchdog Timer is off
LVDSTAT
IPEN
Bit 7
SUMMARY OF WATCHDOG TIMER REGISTERS
R-x
DDCORE
DDCORE
(2)
Bit 6
W = Writable bit
‘1’ = Bit is set
> 2.45V nominal
< 2.45V nominal
(2)
—
ULPLVL
R-x
Bit 5
CM
U-0
—
Bit 4
RI
—
(2)
U = Unimplemented bit, read as ‘0’ q = Depends on condition
‘0’ = Bit is cleared
Bit 3
TO
DS
R-q
DS
ULPEN ULPSINK SWDTEN
Bit 2
PD
(1)
ULPEN
R/W-0
Bit 1
POR
 2011 Microchip Technology Inc.
x = Bit is unknown
ULPSINK
R/W-0
Bit 0
BOR
Reset Values
SWDTEN
on Page:
R/W-0
70
70
bit 0
(1)