PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 141

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PIC18F25J50

Manufacturer Part Number
PIC18F25J50
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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TABLE 10-5:
 2011 Microchip Technology Inc.
RB4/PMA1/
KBI0/SCK1/
SCL1/RP7
RB5/PMA0/
KBI1/SDI1/
SDA1/RP8
RB6/KBI2/
PGC/RP9
Legend: DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level
Note 1:
Pin
2:
3:
input/output; x = Don’t care (TRIS bit does not affect port direction or is overridden for this option)
Pins are configured as analog inputs by default on POR. Using these pins for digital inputs requires setting
the appropriate bits in the ANCONx register first.
All other pin functions are disabled when ICSP™ or MPLAB
This functionality is only available on 44-pin devices.
PORTB I/O SUMMARY (CONTINUED)
Function
PMA1
PMA0
SCK1
SDA1
SCL1
SDI1
KBI0
KBI1
KBI2
PGC
RB4
RP7
RB5
RP8
RB6
RP9
(3)
(3)
Setting
TRIS
0
1
1
0
1
1
0
1
0
1
0
0
1
1
1
0
1
1
0
1
0
0
1
1
x
1
0
I/O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
ST/TTL Parallel Slave Port Address input.
SMBus
ST/TTL Parallel Slave Port Address input
SMBus
Type
DIG
TTL
DIG
TTL
DIG
DIG
DIG
TTL
TTL
DIG
DIG
DIG
TTL
TTL
DIG
I
I
I
I
I/O
ST
ST
ST
ST
ST
ST
2
2
2
2
C/
C/
C
C
LATB<4> data output; not affected by analog input.
PORTB<4> data input; weak pull-up when RBPU bit is
cleared. Disabled when analog input is enabled.
Parallel Master Port Address output.
Interrupt-on-change pin.
SPI clock input (MSSP1 module).
SPI clock output (MSSP1 module).
I
I
Remappable Peripheral Pin 7 input.
Remappable Peripheral Pin 7 output.
LATB<5> data output.
PORTB<5> data input; weak pull-up when RBPU bit is
cleared.
Interrupt-on-change pin.
Parallel Master Port Address output
SPI data input (MSSP1 module).
I
I
Remappable Peripheral Pin 8 input.
Remappable Peripheral Pin 8 output.
LATB<6> data output.
PORTB<6> data input; weak pull-up when RBPU bit is
cleared.
Interrupt-on-change pin.
Serial execution (ICSP™) clock input for ICSP and ICD
operation.
Remappable Peripheral Pin 9 input.
Remappable Peripheral Pin 9 output.
2
2
2
2
C™ clock input (MSSP1 module).
C clock output (MSSP1 module).
C data input (MSSP1 module).
C™/SMBus.
PIC18F46J50 FAMILY
(2)
®
ICD are enabled.
Description
DS39931D-page 141
(1)

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