PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 424
PIC18F25J50
Manufacturer Part Number
PIC18F25J50
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F25J50.pdf
(562 pages)
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PIC18F46J50 FAMILY
REGISTER 27-6:
REGISTER 27-7:
DS39931D-page 424
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3
bit 2-1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-0
Note 1:
WPCFG
R/WO-1
U-1
—
2:
3:
The “Configuration Words page” contains the FCWs and is the last page of implemented Flash memory on
a given device. Each page consists of 1,024 bytes. For example, on a device with 64 Kbytes of Flash, the
first page is 0 and the last page (Configuration Words page) is 63 (3Fh).
Implemented in 64-Kbyte devices (PIC18FX6J50). This bit is reserved on 32-Kbyte and 16-Kbyte devices
(PIC18FX5J50 and PIC18FX4J50) and should always be programmed to ‘0’ for proper operation on these
devices.
and should always be programmed to ‘0’ for proper operation on these devices.
Implemented in 64-Kbyte and 32-Kbyte devices. This bit is reserved on 16-Kbyte devices (PIC18FX4J50)
Unimplemented: Program the corresponding Flash Configuration bit to ‘1’
MSSPMSK: MSSP 7-Bit Address Masking Mode Enable bit
1 = 7-Bit Address Masking mode is enabled
0 = 5-Bit Address Masking mode is enabled
Unimplemented: Read as ‘0’
IOL1WAY: IOLOCK One-Way Set Enable bit
1 = IOLOCK bit (PPSCON<0>) can be set once, provided the unlock sequence has been completed.
0 = IOLOCK bit (PPSCON<0>) can be set and cleared as needed, provided the unlock sequence has
WPCFG: Write/Erase Protect Configuration Region Select bit
1 = Configuration Words page is not erase/write-protected unless WPEND and WPFP<5:0> settings
0 = Configuration Words page is erase/write-protected, regardless of WPDIS, WPEND and
WPEND: Write/Erase Protect Region Select bit (valid when WPDIS = 0)
1 = Flash pages, WPFP<5:0> to Configuration Words page, are erase/write-protected
0 = Flash pages, 0 to WPFP<5:0>, are erase/write-protected
WPFP<5:0>: Write/Erase Protect Page Start/End Location bits
Used with WPEND bit to define which pages in Flash will be erase/write-protected.
WPEND
R/WO-1
Once set, the Peripheral Pin Select registers cannot be written to a second time.
been completed
include the Configuration Words page (and WPDIS = 0)
WPFP<5:0>
U-1
—
CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
WO = Write-Once bit
WO = Write-Once bit
‘1’ = Bit is set
‘1’ = Bit is set
WPFP5
(1)
R/WO-1
U-1
—
(2)
WPFP4
R/WO-1
U-1
—
(3)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
MSSPMSK
R/WO-1
R/WO-1
WPFP3
R/WO-1
(1)
WPFP2
U-0
—
2011 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/WO-1
WPFP1
U-0
—
IOL1WAY
R/WO-1
R/WO-1
WPFP0
bit 0
bit 0
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