PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 248

• Manufacturer Part Number: PIC18F25J50
• Description: 28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F46J50 FAMILY
18.2
In Capture mode, the CCPRxH:CCPRxL register pair
captures the 16-bit value of the TMR1 or TMR3
registers when an event occurs on the corresponding
ECCPx pin. An event is defined as one of the following:
• Every falling edge
• Every rising edge
• Every 4
• Every 16
The event is selected by the mode select bits,
CCPxM<3:0>, of the CCPxCON register. When a
capture is made, the interrupt request flag bit, CCPxIF,
is set; it must be cleared by software. If another capture
occurs before the value in register CCPRx is read, the
old captured value is overwritten by the new captured
value.
18.2.1
In Capture mode, the appropriate ECCPx pin should be
configured as an input by setting the corresponding
TRIS direction bit.
Additionally, the ECCPx input function needs to be
assigned to an I/O pin through the Peripheral Pin
Select module. For details on setting up the
remappable pins, see
Select
FIGURE 18-1:
DS39931D-page 248
Note:
ECCP1 Pin
(PPS)”.
Capture Mode
th
th
ECCP PIN CONFIGURATION
If the ECCPx pin is configured as an
output, a write to the port can cause a
capture condition.
rising edge
rising edge
CCP1CON<3:0>
Prescaler
 1, 4, 16
CAPTURE MODE OPERATION BLOCK DIAGRAM
Section 10.7 “Peripheral Pin
Q1:Q4
4
Edge Detect
4
and
Set CCP1IF
TCLKCON (<T3CCP<2:1>)
TCLKCON (<T3CCP<2:1>)
following any such change in operating mode.
18.2.2
The timers that are to be used with the capture feature
(Timer1 and/or Timer3) must be running in Timer mode
or Synchronized Counter mode. In Asynchronous
Counter mode, the capture operation may not work.
The timer to be used with each ECCP module is
selected in the TCLKCON register
18.2.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit clear to avoid false interrupts.
The interrupt flag bit, CCPxIF, should also be cleared
18.2.4
There are four prescaler settings in Capture mode; they
are specified as part of the operating mode selected by
the mode select bits (CCPxM<3:0>). Whenever the
ECCP module is turned off, or Capture mode is dis-
abled, the prescaler counter is cleared. This means
that any Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared; therefore, the first capture may be from
a non-zero prescaler.
recommended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 18-1:
CLRF
MOVLW
MOVWF
CCP1CON
NEW_CAPT_PS ; Load WREG with the
CCP1CON
TIMER1/TIMER3 MODE SELECTION
SOFTWARE INTERRUPT
ECCP PRESCALER
CHANGING BETWEEN
CAPTURE PRESCALERS
; Turn CCP module off
; new prescaler mode
; value and CCP ON
; Load CCP1CON with
; this value
 2011 Microchip Technology Inc.
Example 18-1
TMR3
Enable
TMR1
Enable
CCPR1H
TMR3H
TMR1H
(Register
provides the
CCPR1L
TMR1L
TMR3L
13-3).