PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 251
PIC18F25J50
Manufacturer Part Number
PIC18F25J50
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F25J50.pdf
(562 pages)
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The CCPRxH register and a 2-bit internal latch are
used to double-buffer the PWM duty cycle. This
double-buffering is essential for glitchless PWM
operation.
When the CCPRxH and 2-bit latch match TMR2
(TMR4), concatenated with an internal 2-bit Q clock or
2 bits of the TMR2 (TMR4) prescaler, the CCPx pin is
cleared.
The maximum PWM resolution (bits) for a given PWM
frequency is given by
EQUATION 18-3:
TABLE 18-2:
2011 Microchip Technology Inc.
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
Note:
PWM Resolution (max) =
PWM Frequency
If the PWM duty cycle value is longer than
the PWM period, the CCPx pin will not be
cleared.
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz
Equation
18-3:
log
(
log(2)
2.44 kHz
F
F
FFh
PWM
OSC
16
10
)
bits
9.77 kHz
FFh
10
4
PIC18F46J50 FAMILY
39.06 kHz
18.4.3
The following steps should be taken when configuring
the CCP module for PWM operation:
1.
2.
3.
4.
5.
FFh
10
1
Set the PWM period by writing to the PR2 (PR4)
register.
Set the PWM duty cycle by writing to the
CCPRxL register and CCPxCON<5:4> bits.
Make the CCPx pin an output by clearing the
appropriate TRIS bit.
Set the TMR2 (TMR4) prescale value, then
enable Timer2 (Timer4) by writing to T2CON
(T4CON).
Configure the CCPx module for PWM operation.
SETUP FOR PWM OPERATION
156.25 kHz
3Fh
1
8
312.50 kHz
1Fh
1
7
DS39931D-page 251
416.67 kHz
6.58
17h
1
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