HD6432670 Hitachi, HD6432670 Datasheet - Page 233

• Manufacturer Part Number: HD6432670
• Description: (HD64F267x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

6.6.12
This LSI is provided with a DRAM refresh control function. CAS-before-RAS (CBR) refreshing
is used. In addition, self-refreshing can be executed when the chip enters the software standby
state.
Refresh control is enabled when any area is designated as DRAM space in accordance with the
setting of bits RMTS2 to RMTS0 in DRAMCR.
RAS Up Mode
To select RAS up mode, clear the RCDM bit to 0 in DRAMCR. Each time access to DRAM
space is interrupted and another space is accessed, the 5$6 signal goes high again. Burst
operation is only performed if DRAM space is continuous. Figure 6.33 shows an example of
the timing in RAS up mode.
ø
Address bus
Data bus
Note: n = 2 to 5
,
(
Refresh Control
)
Figure 6.33 Example of Operation Timing in RAS Up Mode
T
Row address
p
DRAM space read
T
r
(RAST = 0, CAST = 0)
Column address 1 Column address 2
T
c1
T
c2
T
DRAM space
c1
read
Rev. 2.0, 04/02, page 187 of 906
T
c2
External address
Normal space
T
1
read
T
2