HD6432670 Hitachi, HD6432670 Datasheet - Page 580

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HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
11.3.5
TSR registers indicate the status of each channel. The TPU has six TSR registers, one for each
channel.
Bit
7
6
5
4
Rev. 2.0, 04/02, page 534 of 906
Bit Name
TCFD
TCFU
TCFV
Timer Status Register (TSR)
Initial value
1
1
0
0
R/W
R
R/(W)*
R/(W)*
Description
Count Direction Flag
Status flag that shows the direction in which TCNT
counts in channels 1, 2, 4, and 5.
In channels 0 and 3, bit 7 is reserved. It is always
read as 1 and cannot be modified.
0: TCNT counts down
1: TCNT counts up
Reserved
This bit is always read as 1 and cannot be modified.
Underflow Flag
Status flag that indicates that TCNT underflow has
occurred when channels 1, 2, 4, and 5 are set to
phase counting mode.
In channels 0 and 3, bit 5 is reserved. It is always
read as 0 and cannot be modified.
[Setting condition]
When the TCNT value underflows (changes from
H'0000 to H'FFFF)
[Clearing condition]
When 0 is written to TCFU after reading TCFU = 1
Overflow Flag
Status flag that indicates that TCNT overflow has
occurred.
[Setting condition]
When the TCNT value overflows (changes from
H'FFFF to H'0000)
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1

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