HD6432670 Hitachi, HD6432670 Datasheet - Page 94

• Manufacturer Part Number: HD6432670
• Description: (HD64F267x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

2.7
The H8S/2600 CPU supports the eight addressing modes listed in table 2.11. The usable address
modes are different in each instruction.
Arithmetic and logic instructions can use the register direct and immediate modes. Data transfer
instructions can use all addressing modes except program-counter relative and memory indirect.
Bit manipulation instructions use register direct, register indirect, or absolute addressing mode to
specify an operand, and register direct (BSET, BCLR, BNOT, and BTST instructions) or
immediate (3-bit) addressing mode to specify a bit number in the operand.
Rev. 2.0, 04/02, page 48 of 906
Operation Field
Indicates the function of the instruction, the addressing mode, and the operation to be carried
out on the operand. The operation field always includes the first four bits of the instruction.
Some instructions have two operation fields.
Register Field
Specifies a general register. Address registers are specified by 3 bits, data registers by 3 bits or
4 bits. Some instructions have two register fields. Some have no register field.
Effective Address Extension
8, 16, or 32 bits specifying immediate data, an absolute address, or a displacement.
Condition Field
Specifies the branching condition of Bcc instructions.
Addressing Modes and Effective Address Calculation
(1) Operation field only
(2) Operation field and register fields
(3) Operation field, register fields, and effective address extension
(4) Operation field, effective address extension, and condition field
op
Figure 2.11 Instruction Formats (Examples)
op
op
cc
EA (disp)
op
r n
r n
EA (disp)
r m
r m
NOP, RTS, etc.
ADD.B Rn, Rm, etc.
MOV.B @(d:16, Rn), Rm, etc.
BRA d:16, etc.