HD6432670 Hitachi, HD6432670 Datasheet - Page 254

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HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
6.7.11
When synchronous DRAM with a 16-bit configuration is connected, DQMU and DQML are
used for the control signals needed for byte access.
Figures 6.49 and 6.50 show the control timing for DQM, and figure 6.51 shows an example of
connection of byte control by DQMU and DQML.
Rev. 2.0, 04/02, page 208 of 906
Upper data bus
Lower data bus
Precharge-sel
Byte Access Control
Address bus
SDRAMø
DQMU
DQML
CKE
ø
(Upper Byte Write Access: SDWCD = 0, CAS Latency 2)
Figure 6.49 DQMU and DQML Control Timing
Column address
PALL
T
p
Row address
Row address
ACTV
T
r
High
High
NOP
T
c1
Column address
WRIT
High-Z
T
cl
NOP
T
c2

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