HD6432670 Hitachi, HD6432670 Datasheet - Page 436

• Manufacturer Part Number: HD6432670
• Description: (HD64F267x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

8.6
8.6.1
Except for clearing the EDA bit to 0 in EDMDR, settings should not be changed for a channel in
operation (including the transfer standby state). Transfer must be disabled before changing a
setting for an operational channel.
8.6.2
When the MSTP14 bit is set to 1 in MSTPCRH, the EXDMAC clock stops and the EXDMAC
enters the module stop state. However, 1 cannot be written to the MSTP14 bit when any of the
EXDMAC’s channels is enabled for transfer, or when an interrupt is being requested. Before
setting the MSTP14 bit, first clear the EDA bit in EDMDR to 0, then clear the IRF or EDIE bit in
EDMDR to 0.
When the EXDMAC clock stops, EXDMAC registers can no longer be accessed. The following
EXDMAC register settings remain valid in the module stop state, and so should be changed, if
necessary, before making the module stop transition.
8.6.3
Falling edge sensing on the
operations, as indicated below.
[1] Activation request standby state: Waits for low level sensing on
[2] Transfer standby state: Waits for EXDMAC data transfer to become possible, then goes to [3].
[3] Activation request disabled state: Waits for high level sensing on
After EXDMAC transfer is enabled, the EXDMAC goes to state [1], so low level sensing is used
for the initial activation after transfer is enabled.
8.6.4
At the start of activation source acceptance, low level sensing is used for both falling edge sensing
and low level sensing on the
level at the
enabled state.
Rev. 2.0, 04/02, page 390 of 906
ETENDE = 1 in EDMDR (
EDRAKE = 1 in EDMDR (
AMS = 1 in EDMDR (
Usage Notes
EXDMAC Register Access during Operation
Module Stop State
Activation Source Acceptance
Pin Falling Edge Activation
pin that occurs before execution of the EDMDR write for setting the transfer-
pin enable)
pin is performed in synchronization with EXDMAC internal
pin. Therefore, a request is accepted in the case of a low
pin enable)
pin enable)
pin, then goes to [2].
pin, then goes to [1].