HD6432670 Hitachi, HD6432670 Datasheet - Page 322

• Manufacturer Part Number: HD6432670
• Description: (HD64F267x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Bit
5
Rev. 2.0, 04/02, page 276 of 906
Bit Name
DTME0
Initial Value
0
R/W
R/W
Description
Data Transfer Master Enable 0
Together with the DTE0 bit, this bit controls
enabling or disabling of data transfer on
channel 0. When both the DTME0 bit and DTE0
bit are set to 1, transfer is enabled for channel
0.
If channel 0 is in the middle of a burst mode
transfer when an NMI interrupt is generated, the
DTME0 bit is cleared, the transfer is interrupted,
and bus mastership passes to the CPU. When
the DTME0 bit is subsequently set to 1 again,
the interrupted transfer is resumed. In block
transfer mode, however, the DTME0 bit is not
cleared by an NMI interrupt, and transfer is not
interrupted.
[Clearing conditions]
[Setting condition]
When 1 is written to DTME0 after reading
DTME0 = 0
When initialization is performed
When NMI is input in burst mode
When 0 is written to the DTME0 bit