DF3048BVX25V Renesas Electronics America, DF3048BVX25V Datasheet - Page 149

• Manufacturer Part Number: DF3048BVX25V
• Description: MCU 3/5V 128K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3048BVX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

In this situation, conduct one of the following countermeasures.
Countermeasure 1: When clears IRQaF flag, do not use the bit manipulation instruction, read the
ISR in bytes. Then write a value in bytes which sets IRQaF flag to 0 and other bits to 1.
For example, if a = 0
Countermeasure 2: During IRQb interrupt exception processing, carry out IRQbF flag clear
dummy processing.
For example, if b = 1
5.5.5
NMI is an exception processing that can be executed by the interrupt controller and CPU when the
chip internal circuits are operating normally under a specified electrical characteristics. If an NMI
is executed when the circuits are not operating normally due to some factors such as software or
abnormal interrupt of input to the pins (runaway execution), the operation will not be guaranteed.
Incorrect NMI Operation Factors: Software
1. When an interrupt exception processing is executed in an H8/300H CPU, it is assumed that the
2. Requests for NMIs can be accepted on the rising or falling edge of a pin. Acceptance of the
MOV.B @ISR,R0L
MOV.B #HFE,R0L
MOV.B R0L,@ISR
IRQB
stack pointer (SP(ER7)) has already been set by software, and that the stack pointer (SP(ER7))
points to the stack area set in a system such as RAM. If the program is in a runaway execution,
the stack pointer may be overflowed and updated illegally. Therefore, normal operation will
not be guaranteed.
rising or falling edge depends on the setting of the bit NMIEG in the system control register
(SYSCR). It is necessary for the customer to set the bit according to the designated system.
When the program is in a runaway execution, this bit may be rewritten illegally. Therefore, the
system may not operate as expected.
Notes on Non-Maskable Interrupts (NMI)
MOV.B #HFD,R0L
MOV.B R0L,@ISR
·
·
·
Rev. 3.00 Sep 27, 2006 page 121 of 872
Section 5 Interrupt Controller
REJ09B0325-0300