DF3048BVX25V Renesas Electronics America, DF3048BVX25V Datasheet - Page 392

• Manufacturer Part Number: DF3048BVX25V
• Description: MCU 3/5V 128K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3048BVX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 16-Bit Integrated Timer Unit (ITU)
Output compare timing: The compare match signal is generated in the last state in which TCNT
and the general register match (when TCNT changes from the matching value to the next value).
When the compare match signal is generated, the output value selected in TIOR is output at the
output compare pin (TIOCA or TIOCB). When TCNT matches a general register, the compare
match signal is not generated until the next counter clock pulse.
Figure 10.22 shows the output compare timing.
Input Capture Function
The TCNT value can be captured into a general register when a transition occurs at an input
capture/output compare pin (TIOCA or TIOCB). Capture can take place on the rising edge, falling
edge, or both edges. The input capture function can be used to measure pulse width or period.
Sample setup procedure for input capture: Figure 10.23 shows a sample procedure for setting
up input capture.
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TCNT input
clock
TCNT
GR
Compare
match signal
TIOCA,
TIOCB
Figure 10.22 Output Compare Timing
N
N
N + 1