DF3048BVX25V Renesas Electronics America, DF3048BVX25V Datasheet - Page 665

MCU 3/5V 128K PB-FREE 100-TQFP

DF3048BVX25V

Manufacturer Part Number
DF3048BVX25V
Description
MCU 3/5V 128K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3048BVX25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3048BVX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
19.5.1
Table 19.5 summarizes the frequency division register.
Table 19.5
Address *
H'FF5D
Note:
19.5.2
DIVCR is an 8-bit readable/writable register that selects the division ratio of the frequency
divider.
DIVCR is initialized to H'FC by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 2—Reserved: Read-only bits, always read as 1.
Bits 1 and 0—Divide (DIV1 and DIV0): These bits select the frequency division ratio, as
follows.
Bit 1: DIV1
0
1
Bit
Initial value
Read/Write
* The lower 16 bits of the address are shown.
Register Configuration
Division Control Register (DIVCR)
Frequency Division Register
Name
Division control register
Bit 0: DIV0
0
1
0
1
7
1
6
1
Reserved bits
Frequency Division Ratio
1/1
1/2
1/4
1/8
5
1
Abbreviation
DIVCR
4
1
Rev. 3.00 Sep 27, 2006 page 637 of 872
3
1
Section 19 Clock Pulse Generator
2
1
Divide bits 1 and 0
These bits select the
frequency division ratio
R/W
R/W
DIV1
R/W
REJ09B0325-0300
1
0
Initial Value
H'FC
(Initial value)
DIV0
R/W
0
0

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