DF3048BVX25V Renesas Electronics America, DF3048BVX25V Datasheet - Page 373

MCU 3/5V 128K PB-FREE 100-TQFP

DF3048BVX25V

Manufacturer Part Number
DF3048BVX25V
Description
MCU 3/5V 128K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3048BVX25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3048BVX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
the general register functions as an input capture register, the buffer register functions as an input
capture buffer register.
The buffer registers are linked to the CPU by an internal 16-bit bus and can be written or read by
either word or byte access.
Buffer registers are initialized to H'FFFF by a reset and in standby mode.
10.2.10 Timer Control Registers (TCR)
TCR is an 8-bit register. The ITU has five TCRs, one in each channel.
Channel
0
1
2
3
4
Each TCR is an 8-bit readable/writable register that selects the timer counter clock source, selects
the edge or edges of external clock sources, and selects how the counter is cleared.
TCR is initialized to H'80 by a reset and in standby mode.
Bit 7—Reserved: Read-only bit, always read as 1.
Bit
Initial value
Read/Write
Abbreviation
TCR0
TCR1
TCR2
TCR3
TCR4
Reserved bit
7
1
CCLR1
Counter clear 1, 0
These bits select the counter clear source
R/W
6
0
Function
TCR controls the timer counter. The TCRs in all channels are
functionally identical. When phase counting mode is selected in
channel 2, the settings of bits CKEG1 and CKEG0 and TPSC2
to TPSC0 in TCR2 are ignored.
CCLR0
R/W
5
0
CKEG1
Clock edge 1, 0
These bits select external clock edges
R/W
4
0
Section 10 16-Bit Integrated Timer Unit (ITU)
Rev. 3.00 Sep 27, 2006 page 345 of 872
CKEG0
R/W
3
0
TPSC2
R/W
Timer prescaler 2 to 0
These bits select the
counter clock
2
0
TPSC1
R/W
REJ09B0325-0300
1
0
TPSC0
R/W
0
0

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