DF3048BVX25V Renesas Electronics America, DF3048BVX25V Datasheet - Page 276

• Manufacturer Part Number: DF3048BVX25V
• Description: MCU 3/5V 128K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3048BVX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 8 DMA Controller
8.4.10
During a DMA transfer, if the bus right is requested by an external bus request signal (BREQ) or
by the refresh controller, the DMAC releases the bus after completing the transfer of the current
byte or word. If there is a transfer request at this point, the DMAC requests the bus right again.
Figure 8.20 shows an example of the timing of insertion of a refresh cycle during a burst transfer
on channel 0.
Rev. 3.00 Sep 27, 2006 page 248 of 872
REJ09B0325-0300
Address
bus
RD
HWR
LWR
Address
bus
RD
HWR LWR
,
,
External Bus Requests, Refresh Controller, and DMAC
DMAC cycle
(channel 1)
T
1
Figure 8.20 Bus Timing of Refresh Controller and DMAC
T
1
Figure 8.19 Timing of Multiple-Channel Operations
T
2
DMAC cycle (channel 0)
T
2
T
1
T
1
T
CPU
cycle
2
T
2
T
1
T
d
T
2
T
1
T
DMAC cycle
(channel 0A)
1
T
2
T
2
T
T
1
Refresh
cycle
1
T
T
2
2
T
T
1
d
CPU
cycle
T
T
2
DMAC cycle (channel 0)
1
T
T
d
2
T
T
1
DMAC cycle
(channel 1)
1
T
T
2
2
T
T
1
1
T
T
2
2