DF3048BVX25V Renesas Electronics America, DF3048BVX25V Datasheet - Page 475

MCU 3/5V 128K PB-FREE 100-TQFP

DF3048BVX25V

Manufacturer Part Number
DF3048BVX25V
Description
MCU 3/5V 128K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3048BVX25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3048BVX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit 6—Reset Output Enable (RSTOE): Enables or disables external output at the RESO pin of
the reset signal generated if TCNT overflows during watchdog timer operation. Note that there is
no RESO pin in the versions with on-chip flash memory.
Bits 5 to 0—Reserved: These bits cannot be modified and are always read as 1.
12.2.4
The watchdog timer’s TCNT, TCSR, and RSTCSR registers differ from other registers in being
more difficult to write. The procedures for writing and reading these registers are given below.
Writing to TCNT and TCSR
These registers must be written by a word transfer instruction. They cannot be written by byte
instructions. Figure 12.2 shows the format of data written to TCNT and TCSR. TCNT and TCSR
both have the same write address. The write data must be contained in the lower byte of the
written word. The upper byte must contain H'5A (password for TCNT) or H'A5 (password for
TCSR). This transfers the write data from the lower byte to TCNT or TCSR.
Bit 6
RSTOE
0
1
TCNT write
TCSR write
Note: * Lower 16 bits of the address.
Notes on Register Rewriting
Address
Address
Description
Reset signal is not output externally
Reset signal is output externally
Figure 12.2 Format of Data Written to TCNT and TCSR
H'FFA8 *
H'FFA8 *
15
15
H'5A
H'A5
Rev. 3.00 Sep 27, 2006 page 447 of 872
8 7
8 7
Section 12 Watchdog Timer
Write data
Write data
REJ09B0325-0300
(Initial value)
0
0

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