DF3048BVX25V Renesas Electronics America, DF3048BVX25V Datasheet - Page 347

MCU 3/5V 128K PB-FREE 100-TQFP

DF3048BVX25V

Manufacturer Part Number
DF3048BVX25V
Description
MCU 3/5V 128K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3048BVX25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3048BVX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
10.1
The H8/3048B Group has a built-in 16-bit integrated timer unit (ITU) with five 16-bit timer
channels.
When the ITU is not used, it can be independently halted to conserve power. For details see
section 20.6, Module Standby Function.
10.1.1
ITU features are listed below.
Capability to process up to 12 pulse outputs or 10 pulse inputs
Ten general registers (GRs, two per channel) with independently-assignable output compare or
input capture functions
Selection of eight counter clock sources for each channel:
Internal clocks: , /2, /4, /8
External clocks: TCLKA, TCLKB, TCLKC, TCLKD
Five operating modes selectable in all channels:
Phase counting mode selectable in channel 2
Two-phase encoder output can be counted automatically.
Waveform output by compare match
Selection of 0 output, 1 output, or toggle output (only 0 or 1 output in channel 2)
Input capture function
Rising edge, falling edge, or both edges (selectable)
Counter clearing function
Counters can be cleared by compare match or input capture
Synchronization
Two or more timer counters (TCNTs) can be preset simultaneously, or cleared
simultaneously by compare match or input capture. Counter synchronization enables
synchronous register input and output.
PWM mode
PWM output can be provided with an arbitrary duty cycle. With synchronization, up to
five-phase PWM output is possible
Overview
Features
Section 10 16-Bit Integrated Timer Unit (ITU)
Section 10 16-Bit Integrated Timer Unit (ITU)
Rev. 3.00 Sep 27, 2006 page 319 of 872
REJ09B0325-0300

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