HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 10

• Manufacturer Part Number: HD6413003TF16V
• Description: MCU 5V 0K PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413003TF16V

• Core Size: 16-Bit
• Oscillator Type: Internal
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• No. Of Timers: 11
• No. Of Pwm Channels: 4
• Digital Ic Case Style: QFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 7
7.1
7.2
7.3
7.4
7.5
Section 8
8.1
8.2
8.3
8.4
6.4.2
6.4.3
Overview ........................................................................................................................ 135
7.1.1
7.1.2
7.1.3
7.1.4
Register Descriptions...................................................................................................... 138
7.2.1
7.2.2
7.2.3
7.2.4
Operation ........................................................................................................................ 144
7.3.1
7.3.2
7.3.3
7.3.4
Interrupt Source .............................................................................................................. 171
Usage Notes .................................................................................................................... 171
Overview ........................................................................................................................ 173
8.1.1
8.1.2
8.1.3
8.1.4
8.1.5
Register Descriptions (1) (Short Address Mode) ........................................................... 179
8.2.1
8.2.2
8.2.3
8.2.4
Register Descriptions (2) (Full Address Mode).............................................................. 187
8.3.1
8.3.2
8.3.3
8.3.4
Operation ........................................................................................................................ 196
8.4.1
Register Write Timing .................................................................................... 132
BREQ Input Timing........................................................................................ 133
Features........................................................................................................... 135
Block Diagram................................................................................................ 136
Input/Output Pins............................................................................................ 137
Register Configuration.................................................................................... 137
Refresh Control Register (RFSHCR) ............................................................. 138
Refresh Timer Control/Status Register (RTMCSR) ....................................... 141
Refresh Timer Counter (RTCNT)................................................................... 143
Refresh Time Constant Register (RTCOR) .................................................... 143
Area Division.................................................................................................. 144
DRAM Refresh Control.................................................................................. 145
Pseudo-Static RAM Refresh Control.............................................................. 160
Interval Timing ............................................................................................... 165
Features........................................................................................................... 173
Block Diagram................................................................................................ 174
Functional Overview....................................................................................... 175
Input/Output Pins............................................................................................ 176
Register Configuration.................................................................................... 176
Memory Address Registers (MAR)................................................................ 180
I/O Address Registers (IOAR)........................................................................ 181
Execute Transfer Count Registers (ETCR)..................................................... 181
Data Transfer Control Registers (DTCR) ....................................................... 183
Memory Address Registers (MAR)................................................................ 187
I/O Address Registers (IOAR)........................................................................ 187
Execute Transfer Count Registers (ETCR)..................................................... 188
Data Transfer Control Registers (DTCR) ....................................................... 190
Overview......................................................................................................... 196
Refresh Controller
DMA Controller
........................................................................................ 173
.................................................................................... 135