HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 101
HD6413003TF16V
Manufacturer Part Number
HD6413003TF16V
Description
MCU 5V 0K PB-FREE 112-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.D13003TF16V.pdf
(717 pages)
Specifications of HD6413003TF16V
Core Size
16-Bit
Oscillator Type
Internal
Core Processor
H8/300H
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
No. Of I/o's
58
Ram Memory Size
512Byte
Cpu Speed
16MHz
No. Of Timers
11
No. Of Pwm Channels
4
Digital Ic Case Style
QFP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/300H
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6413003TF16V
Manufacturer:
ITT
Quantity:
12 000
Company:
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS
Quantity:
36
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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Interrupt Priority Register B (IPRB): IPRB is an 8-bit readable/writable register in which
interrupt priority levels can be set.
IPRB is initialized to H'00 by a reset and in hardware standby mode.
Bit
Initial value
Read/Write
IPRB7
Priority level B7
Selects the priority level of ITU channel 3 interrupt requests
R/W
7
0
IPRB6
Priority level B6
Selects the priority level of ITU channel 4 interrupt requests
R/W
6
0
IPRB5
Priority level B5
Selects the priority level of DMAC group 0 interrupt
requests (channels 0 and 1)
R/W
5
0
IPRB4
81
Priority level B4
Selects the priority level of DMAC group 1
interrupt requests (channels 2 and 3)
R/W
4
0
IPRB3
Priority level B3
Selects the priority level of SCI
channel 0 interrupt requests
R/W
3
0
Priority level B2
Selects the priority level of
SCI channel 1 interrupt requests
IPRB2
R/W
2
0
Priority level B1
Selects the priority level
of A/D converter
interrupt request
IPRB1
R/W
1
0
Reserved bit
R/W
—
0
0
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